QPSK調(diào)制和解調(diào)VHDL代碼Quartus仿真

名稱：QPSK調(diào)制和解調(diào)VHDL代碼Quartus仿真

軟件：Quartus

語言：VHDL

代碼功能：

QPSK調(diào)制和解調(diào)

1、使用正弦波作為載波；

2、實現(xiàn)QPSK調(diào)制功能，輸出QPSK調(diào)制波形；

3、實現(xiàn)QPSK解調(diào)功能，將QPSK調(diào)制信號解調(diào)出數(shù)據(jù)。

FPGA代碼Verilog/VHDL代碼資源下載：www.hdlcode.com

演示視頻：

設(shè)計文檔：

1. 工程文件

2. 程序文件

3. 程序編譯

4. Testbench

5. 仿真圖

調(diào)制過程：首先通過m序列產(chǎn)生隨機(jī)信號，作為調(diào)制信號，再將改信號轉(zhuǎn)換為2為并行數(shù)據(jù)，通過在正弦波基礎(chǔ)上改變相位得到QPSK信號。

5.1 QPSK調(diào)制部分

解調(diào)過程：將QPSK信號與sin和cos載波相乘，再對相乘的結(jié)果進(jìn)行濾波，即可解調(diào)得到原信號。

5.2 QPSK解調(diào)部分

部分代碼展示:

LIBRARY?ieee;
???USE?ieee.std_logic_1164.all;
--QPSK調(diào)制模塊
ENTITY?QPSK_modulate?IS
???PORT?(
??????clk???:?IN?STD_LOGIC;
??????rst???:?IN?STD_LOGIC;
??????qout??:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0)
???);
END?QPSK_modulate;
ARCHITECTURE?behave?OF?QPSK_modulate?IS
???--串并轉(zhuǎn)換模塊
???COMPONENT?sipo?IS
??????PORT?(
?????????clk???:?IN?STD_LOGIC;
?????????dout??:?IN?STD_LOGIC;
?????????a?????:?OUT?STD_LOGIC;
?????????b?????:?OUT?STD_LOGIC
??????);
???END?COMPONENT;
???
--m序列，用于產(chǎn)生調(diào)制信號
???COMPONENT?m_code?IS
??????PORT?(
?????????clk???:?IN?STD_LOGIC;
?????????rst???:?IN?STD_LOGIC;
?????????dout??:?OUT?STD_LOGIC
??????);
???END?COMPONENT;
???
--調(diào)制載波
???COMPONENT?carrier_wave?IS
??????PORT?(
?????????clk???:?IN?STD_LOGIC;
?????????qout??:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0);
?????????a?????:?IN?STD_LOGIC;
?????????b?????:?IN?STD_LOGIC
??????);
???END?COMPONENT;
???
???
???SIGNAL?dout???????:?STD_LOGIC;
???SIGNAL?div2???????:?STD_LOGIC;
???SIGNAL?a??????????:?STD_LOGIC;
???SIGNAL?b??????????:?STD_LOGIC;
???SIGNAL?qout_buf?:?STD_LOGIC_VECTOR(7?DOWNTO?0);
BEGIN
--輸出調(diào)制信號
???qout?<=?qout_buf;
?????
???--調(diào)用m序列
???i_m_code?:?m_code
??????PORT?MAP?(
?????????clk???=>?clk,
?????????rst???=>?rst,
?????????dout??=>?dout--輸出m序列
??????);
???
--串并轉(zhuǎn)換
???i_sipo?:?sipo
??????PORT?MAP?(
?????????clk???=>?clk,
?????????dout??=>?dout,--串行輸入
?????????a?????=>?a,--輸出
?????????b?????=>?b?--輸出
??????);
???
???--載波模塊???
???i_carrier_wave?:?carrier_wave
??????PORT?MAP?(
?????????clk???=>?clk,
?????????qout??=>?qout_buf,--QPSK調(diào)制信號
?????????a?????=>?a,
?????????b?????=>?b
??????);
???
END?behave;

點擊鏈接獲取代碼文件：http://www.hdlcode.com/index.php?m=home&c=View&a=index&aid=524