名稱:出租車計(jì)價(jià)設(shè)計(jì)VHDL代碼Quartus仿真
軟件:Quartus
語言:VHDL
代碼功能:
任務(wù)及要求:
CPLD為復(fù)雜可編程邏輯器件,通過EDA技術(shù)對(duì)其進(jìn)行編程,可將一個(gè)較復(fù)雜的數(shù)字系統(tǒng)集成于一個(gè)芯片中,制成專用集成電路芯片,并可隨時(shí)在系統(tǒng)修改其邏輯功能。并最終完成電路的編程調(diào)試。
具體要求如下:
1.實(shí)現(xiàn)計(jì)費(fèi)功能,計(jì)費(fèi)標(biāo)準(zhǔn)為:按行駛里程計(jì)費(fèi),起步價(jià)為7元,并在車行3Km后按2元/Km計(jì)費(fèi),當(dāng)計(jì)費(fèi)器達(dá)到或超過20元時(shí),每公里加收50%的車費(fèi),車停止不計(jì)費(fèi)。
2.現(xiàn)場(chǎng)模擬功能:能模擬汽車起動(dòng)、停止、暫停以及加速等狀態(tài)。
3.用BCD碼將車費(fèi)和路程顯示出來。
FPGA代碼Verilog/VHDL代碼資源下載:www.hdlcode.com
演示視頻:
設(shè)計(jì)文檔:
1. 工程文件
2. 程序文件
3. 程序編譯
4. 仿真圖
Testbench
4.1 整體仿真
4.2 顯示模塊
4.3 速度脈沖模塊
4.4 計(jì)費(fèi)模塊
部分代碼展示:
LIBRARY?ieee; ???USE?ieee.std_logic_1164.all; --出租車計(jì)費(fèi) ENTITY?taxi_fee?IS ???PORT?( ??????clk????????:?IN?STD_LOGIC;--256Hz基準(zhǔn)頻率CLOCK0 ??????reset??????:?IN?STD_LOGIC;--復(fù)位信號(hào),低有效? ??????stop???????:?IN?STD_LOGIC;--本次行程結(jié)束,停止計(jì)費(fèi),高有效 ??????start??????:?IN?STD_LOGIC;--啟動(dòng)信號(hào),行程開始,高有效? ??????Speed??????:?IN?STD_LOGIC_VECTOR(1?DOWNTO?0);--00:暫停等待;01:低速;10:中;,11:高速 ??????Kmmoney_L??:?OUT?STD_LOGIC_VECTOR(3?DOWNTO?0);--合計(jì)費(fèi)用?HML=xxx?(BCD碼顯示) ??????Kmmoney_M??:?OUT?STD_LOGIC_VECTOR(3?DOWNTO?0);--合計(jì)費(fèi)用?HML=xxx?(BCD碼顯示) ??????Kmmoney_H??:?OUT?STD_LOGIC_VECTOR(3?DOWNTO?0);--合計(jì)費(fèi)用?HML=xxx?(BCD碼顯示) ?????? ??????Kmcount_H??:?OUT?STD_LOGIC_VECTOR(3?DOWNTO?0);--總路程,里程范圍為HL=0~99(BCD碼顯示) ??????Kmcount_L??:?OUT?STD_LOGIC_VECTOR(3?DOWNTO?0)--總路程,里程范圍為HL=0~99(BCD碼顯示) ???); END?taxi_fee; ARCHITECTURE?trans?OF?taxi_fee?IS --模塊例化 ???COMPONENT?display?IS ??????PORT?( ?????????clk????????:?IN?STD_LOGIC; ?????????reset??????:?IN?STD_LOGIC; ?????????totel_money?:?IN?STD_LOGIC_VECTOR(15?DOWNTO?0); ?????????mileage????:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0); ?????????Kmmoney_L??:?OUT?STD_LOGIC_VECTOR(3?DOWNTO?0); ?????????Kmmoney_M??:?OUT?STD_LOGIC_VECTOR(3?DOWNTO?0); ?????????Kmmoney_H??:?OUT?STD_LOGIC_VECTOR(3?DOWNTO?0); ?????????Kmcount_H??:?OUT?STD_LOGIC_VECTOR(3?DOWNTO?0); ?????????Kmcount_L??:?OUT?STD_LOGIC_VECTOR(3?DOWNTO?0) ??????); ???END?COMPONENT; --模塊例化??? ???COMPONENT?speed_pulse?IS ??????PORT?( ?????????clk????????:?IN?STD_LOGIC; ?????????reset??????:?IN?STD_LOGIC; ?????????Speed??????:?IN?STD_LOGIC_VECTOR(1?DOWNTO?0); ?????????one_kilometre?:?OUT?STD_LOGIC ??????); ???END?COMPONENT; --模塊例化 COMPONENT?taxi_state?IS ???PORT?( ??????clk??????????????:?IN?STD_LOGIC; ??????reset????????????:?IN?STD_LOGIC; ?????? ??????stop?????????????:?IN?STD_LOGIC; ??????start????????????:?IN?STD_LOGIC; ??????Speed????????????:?IN?STD_LOGIC_VECTOR(1?DOWNTO?0); ??????one_kilometre????:?IN?STD_LOGIC; ??????mileage_out??????:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0); ??????totel_money_out??:?OUT?STD_LOGIC_VECTOR(15?DOWNTO?0) ???); ???END?COMPONENT; ??? --信號(hào)定義 ???SIGNAL?one_kilometre???:?STD_LOGIC; ???SIGNAL?totel_money?????:?STD_LOGIC_VECTOR(15?DOWNTO?0); ???SIGNAL?mileage?????????:?STD_LOGIC_VECTOR(7?DOWNTO?0); BEGIN ???--速度脈沖產(chǎn)生模塊 ???U_speed_pulse?:?speed_pulse ??????PORT?MAP?( ?????????clk?????????????=>?clk,--標(biāo)準(zhǔn)時(shí)鐘,256hz? ?????????reset???????????=>?reset,--復(fù)位信號(hào),低有效? ?????????Speed???????????=>?Speed,--00:暫停等待 ?????????one_kilometre???=>?one_kilometre--1公里產(chǎn)生一次脈沖 ??????);
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